1. Field of the Invention
This invention relates to semiconductor fabrication and more particularly to an integrated circuit which employs local interconnect for reducing cross coupled noise within conductors arranged above the local interconnect. The local interconnect is advantageously connected to a power supply for sinking transient noise spikes from the overlying conductors.
2. Description of the Invention
An integrated circuit includes numerous conductors extending across the topography of a monolithic substrate. A set of interconnect lines (or conductors) which serve to electrically connect two or more components within a system is generally referred to as a "bus". A collection of voltage levels are forwarded across the conductors to allow proper operation of the components. For example, a microprocessor is connected to memories and input/output devices by certain bus structures. There are numerous types of busses which are classified according to their operation. Examples of well-known types of busses include address busses, data busses and control busses.
Conductors within a bus generally extend partially parallel to each other across the semiconductor topography. The conductors are isolated from each other and from underlying conductive elements by a dielectric, a suitable dielectric being, for example, silicon dioxide ("oxide"). Conductors are thereby lithography patterned across the semiconductor topography, wherein the topography comprises a substrate with a dielectric placed thereon. The topography can also include one or more layers of conductors which are covered by a dielectric material. The layers of conductors overlaid with a dielectric present a topography upon which a subsequent layer of conductors can be patterned.
Conductors are made from an electrically conductive material, a suitable material being a metal or metal silicide. Substrate includes any type of material which can retain dopant ions and the isolated conductivity regions brought about by those ions. Typically, substrate is a silicon-based material which receives p-type or n-type ions.
In order to complete the fabrication of an integrated circuit, isolated regions within the substrate and conductors spaced above the substrate must be interconnected. Wherever a connection is needed between a substrate and conductor, or between conductors on separate levels, an opening in the dielectric must be provided to allow such context to occur. Formation of openings and fabrication of ohmic materials in those openings is generally referred to as contact technology. Depending upon what is being contacted, contact technology varies. For example, contact of a polysilicon conductor to an isolated silicon region differs substantially from contact of a metal conductor to a polysilicon conductor or metal to silicon. Typically, the design rule spacing requirements are dissimilar depending upon the features being contacted.
Contact of a polysilicon conductor to underlying silicon substrate is performed simply by forming an opening in the interposed dielectric. When the polysilicon is subsequently deposited, the polysilicon forms an electrical contact with the silicon in the opening but is isolated everywhere else. The aforementioned contact structure is typically referred to as a "buried contact" because a metal conductor can cross over a dielectric-covered buried contact without making an electrical connection to it. The use of buried contacts provides an important benefit in that it makes available an additional level of interconnect on an integrated circuit.
A polysilicon conductor, as part of a buried contact, is not as universal as a metal conductor for two reasons. First, a polysilicon conductor cannot cross over regions where a transistor gate exists without making a contact to the gate. Second, polysilicon resistivity is substantially higher than that of aluminum (Al). Since metal conductors can extend in an unrestricted fashion across a semiconductor topography, metal conductors are generally referred to as global interconnects, to distinguish them from the routing-restricted interconnect of polysilicon. Thus, polysilicon conductors are distinguished from metal conductors, and are often termed "local interconnect".
There are many types of materials used to establish local interconnects. For example, local interconnects can be formed in numerous ways, some of which are (i) a refractory metal silicide upon polysilicon, (ii) a single or double-doped polysilicon, (iii) multi-layered refractory metal partially converted to silicide, and (iv) refractory metal deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD).
Local interconnects and associate buried contacts serve an important function. Primarily, local interconnects make available an additional level of interconnect on the integrated circuit. Local interconnects, when covered with a dielectric, allow global interconnect such as metal conductors to extend over the local interconnect and buried contacts. Thus, local interconnects afford an additional interconnect level provided the added resistance of a local interconnect would not deleteriously affect circuit performance. For this reason, local interconnects are generally used for short interconnect runs relative to much longer metal conductors. Local interconnects are used primarily to interconnect gates and drains in MOS circuits, and are prevalent in, for example, high density VLSI logic and SRAMs. An SRAM cell layout can be substantially reduced when a local interconnect level and associated buried contacts are used.
Referring now to FIG. 1, an exemplary SRAM cell of conventional design is shown. SRAM cell 10 includes a pair of cross-coupled transistors 12 and a pair of access transistors 14. Application of a word bit (W0 and W1) will force the output from transistors 12 to undergo a change in state when a sufficient voltage magnitude and duration of bit input (B0 or B1) exists.
A chief disadvantage of an SRAM cell is that it consists of several devices (four are shown), as compared to only two devices needed for a dynamic memory cell. Thus, even when the same set of design rules is used, an SRAM die cannot be built with as many cells as a DRAM die. As SRAMs have evolved, they have undergone an increase in density. Most of this has been due to the use of smaller line widths. However, density improvements occur when using, for example, buried contacts, local interconnects, and poly load resistors 16 in lieu of devices.
FIG. 1 illustrates an SRAM cell having four devices and two poly load resistors 16, instead of a cell having six devices. In a four-transistor cell having two poly load resistors 16, there are no P-channel devices, so no N-channel-to-P-channel isolation is needed. Furthermore, the poly load resistors 16 simply require buried contacts rather than metal contacts needed to connect N-channel and P-channel devices. Buried contacts, by definition, take less space than metal contacts.
The smaller geometry afforded by poly load resistors is principally achieved by using not only buried contacts, but associated local interconnect as well. Typically, a high density SRAM cell employs two polysilicon local interconnect levels. A first level of local interconnect is typically a metal polycide structure formed upon polysilicon, and is generally used for the VSS power line as well as the gates of MOS transistors 12. The local interconnect level is also a polycide conductor for both the high-valued load resistors 16 and the low-resistance VDD lines. From the above, it is recognized that local interconnect is advantageously used in SRAMs or in any VLSI device when short interconnect runs are needed, or where buried contact sizings prove advantageous. Conventionally, however, local interconnects are therefore used not only to connect to VSS or VDD, but when applied in an SRAM environment are also used as gate-to-drain interconnect structures. If local interconnect is coupled as a gate structure it, by definition, must take on differing operational voltage values ranging between VDD and VSS or alternating between VDD and VSS (depending upon the voltage value of B0 or B1). In the cross-coupled example, the voltage value on one local interconnect gate structure will be opposite that of the other local interconnect gate structure. In conventional applications, therefore, local interconnects must take on non-fixed operational voltage values of the functional circuit.
It would be desirable to employ local interconnect not simply as short routing runs of a multi-layered structure. An improvement might exist whereby the local interconnect is used to remove cross-coupling noise of adjacent conductors. To remove the operational noise of the conductor, an improvement is needed whereby the local interconnect is coupled to a fixed power supply voltage, and is not afforded the opportunity to transition from the power supply or between power supplies as in conventional designs. The improved design must thereby use a local interconnect for reasons dissimilar from conventional local interconnects.